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Sec 2 Express Mathematics
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Friday, 1 May 2015. In this paper we design an existing flip-flop “Low power clocked pass transistor flip-flop (LCPTFF)” on CNTFET using Stanford CNTFET model for reference. We propose a design of CNTFET based Forced Stack Low Power Clocked Pass Transistor Flip-Flop (CN-FS-LCPTFF) and observe 12% to 25% power reduction in various conditions like temperature change, CNTFET diameter change, and different voltage supply. Download Full Research Paper. Vikas Sharma, Umesh Dutta,. Sunday, 1 March 2015. Intel E...