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async.caltech.edu

Caltech Asynchronous VLSI Group

Homepage of the Asynchronous VLSI group, part of the Department of Computer Science at Caltech, located in Pasadena, California, USA.

http://async.caltech.edu/

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Caltech Asynchronous VLSI Group | async.caltech.edu Reviews
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DESCRIPTION
Homepage of the Asynchronous VLSI group, part of the Department of Computer Science at Caltech, located in Pasadena, California, USA.
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KEYWORDS
1 computer science
2 VLSI
3 asynchronous
4 self-timed
5 clockless
6 QDI
7 delay insensitive
8 quasi delay insensitive
9 chip design
10 caltech
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concurrency and vlsi,asynchronous vlsi
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Caltech Asynchronous VLSI Group | async.caltech.edu Reviews

https://async.caltech.edu

Homepage of the Asynchronous VLSI group, part of the Department of Computer Science at Caltech, located in Pasadena, California, USA.

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async.caltech.edu async.caltech.edu
1

CHIPS (Caltech Asynchronous VLSI Group)

http://async.caltech.edu/chips.html

ASYNCHRONOUS VLSI CHIPS @ CALTECH. We have selected three of the chips designed and fabricated by our group. To read a description of the chip, click on its name. Back to Asynchronous VLSI Group Home. Mailing Address: Alain Martin, Department of Computer Science, Caltech 256-80, Pasadena CA 91125, USA. This research is supported by the National Science Foundation. Last Modified: May 2008.

2

PUBLICATIONS -- Papers (Caltech Asynchronous VLSI Group)

http://async.caltech.edu/publications.html

CONCURRENCY and VLSI: PUBLICATIONS. A Proof of the Adversary-Path Conjecture. Alain J. Martin. Caltech Technical Report CaltechCSTR:2015.001. April 2015 [ PDF. DD1: A QDI, Radiation-hard-by-Design, Near-Threshold 18uW/MIPS Microcontroller in 40nm Bulk CMOS. Sean Keller, Alain J. Martin, Chris Moore. Proc. 21th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2015). May 2015 [ PDF. Quantifying Near-Threshold CMOS Circuit Robustness (Extended Version). November 2014 [ PDF. Alain J&#...

3

CLASSES (Caltech Asynchronous VLSI Group)

http://async.caltech.edu/classes.html

CS 139 a. Concurrency in Computation. 9 units (3-0-6); third term. Prerequisite: CS 20 or equivalent. CS 181 abc. VLSI Design Laboratory. 12 units (3-6-3); first, second, third terms. CS 185 abc. Asynchronous VLSI Design Laboratory. 9 units (3-3-3); first, second, third terms. Prerequisite: CS 139. Back to Asynchronous VLSI Group Home. Mailing Address: Alain Martin, Department of Computer Science, Caltech 256-80, Pasadena CA 91125, USA. This research is supported by the National Science Foundation.

4

Caltech Asynchronous VLSI Group

http://async.caltech.edu/index.html

Simplicity is the ultimate sophistication.". Leonardo da Vinci -. Currently, our main research topic is asynchronous VLSI. A digital circuit is called "asynchronous" when it doesn't use a clock, and therefore such circuits lend themselves perfectly to a high-level synthesis approach. We believe that the complexity and brittleness of today's VLSI systems requires new design methods based on asynchronous techniques, concurrency, high-level synthesis, and verification. Read more. CONCURRENCY IN COMPUTATION -.

5

PEOPLE (Caltech Asynchronous VLSI Group)

http://async.caltech.edu/people.html

Alain J. Martin. Marc Renaudin, Grenoble France. Joseph Chang, NTU Singapore. Abe Ankumah, Drazen Borkovic, Jerry Burch, Steve Burns, James Cook, Uri Cummings, Jonathan Dama, Eitan Grinspun, Wonjin Jang. Matt Hanna, Pieter Hazewindus, H. Peter Hofstee, Tak-Kwan Tony Lee. Pey-yun Peggy Li, Andrew Lines, Rajit Manohar, Mika Nyström,. Karl Papadantonakis, Paul Penzes. Robert Southworth, José Tierno, Marcel van der Goot. Kevin van Horn, Catherine Wong. Back to Asynchronous VLSI Group Home.

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Simplicity is the ultimate sophistication.". Leonardo da Vinci -. Currently, our main research topic is asynchronous VLSI. A digital circuit is called "asynchronous" when it doesn't use a clock, and therefore such circuits lend themselves perfectly to a high-level synthesis approach. We believe that the complexity and brittleness of today's VLSI systems requires new design methods based on asynchronous techniques, concurrency, high-level synthesis, and verification. Read more. CONCURRENCY IN COMPUTATION -.

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