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dave-roberts.me.uk

DAVID ROBERTS

Welcome to my website! I'm Dave Roberts, a Computer Architect and Ph.D. graduate from the University of Michigan. CLICK HERE TO VIEW PATENTS. My PhD. Thesis is entitled;. Efficient Data Center Architectures Using Non-Volatile Memory and Reliability Techniques. You can DOWNLOAD IT HERE. It has three major focuses;. Nanostores: Co-Located Compute-Storage NVRAM-based Architecture for Data-Centric Workloads. On-chip Cache Memory Fault-Tolerance. CLICK HERE TO VIEW OTHER PUBLISHED PAPERS.

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DAVID ROBERTS | dave-roberts.me.uk Reviews
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Welcome to my website! I'm Dave Roberts, a Computer Architect and Ph.D. graduate from the University of Michigan. CLICK HERE TO VIEW PATENTS. My PhD. Thesis is entitled;. Efficient Data Center Architectures Using Non-Volatile Memory and Reliability Techniques. You can DOWNLOAD IT HERE. It has three major focuses;. Nanostores: Co-Located Compute-Storage NVRAM-based Architecture for Data-Centric Workloads. On-chip Cache Memory Fault-Tolerance. CLICK HERE TO VIEW OTHER PUBLISHED PAPERS.
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DAVID ROBERTS | dave-roberts.me.uk Reviews

https://dave-roberts.me.uk

Welcome to my website! I'm Dave Roberts, a Computer Architect and Ph.D. graduate from the University of Michigan. CLICK HERE TO VIEW PATENTS. My PhD. Thesis is entitled;. Efficient Data Center Architectures Using Non-Volatile Memory and Reliability Techniques. You can DOWNLOAD IT HERE. It has three major focuses;. Nanostores: Co-Located Compute-Storage NVRAM-based Architecture for Data-Centric Workloads. On-chip Cache Memory Fault-Tolerance. CLICK HERE TO VIEW OTHER PUBLISHED PAPERS.

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Publications

http://dave-roberts.me.uk/publications/pub.html

Efficient Data Center Architectures Using Non-Volatile Memory and Reliability Techniques. Shidhartha Das, David Roberts, David Blaauw, David Bull, Trevor Mudge, Architectural Techniques for Adaptive Computing , Chapter in Adaptive Techniques for Dynamic Processor Optimization: Theory and Practice, Alice Wang and Sam Naffziger, editors, ISBN 978-0-387-76471-9, Springer Publishing Company, July 2008. In Microprocessors and Microsystems, August 2008, Vol. 32, issue. 5-6, pp. 244-253. Mehul Shah, Parthasarat...

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Patents

http://dave-roberts.me.uk/publications/patents.html

Apparatus Having a Flattened-Level Data Storage Hierarchy and methods for its use. United States patent application number 61/3111744. Managing Wear on Independent Storage Devices. United States patent application number 12/813772. Optical Data Path Systems. United States patent application number 12/898798. Accordion: Energy-aware page caching for multi-technology main memory. United States patent application number 12/588592. Storage of Data in Data Stores having some Faulty Storage Locations.

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Welcome to my website! I'm Dave Roberts, a Computer Architect and Ph.D. graduate from the University of Michigan. CLICK HERE TO VIEW PATENTS. My PhD. Thesis is entitled;. Efficient Data Center Architectures Using Non-Volatile Memory and Reliability Techniques. You can DOWNLOAD IT HERE. It has three major focuses;. Nanostores: Co-Located Compute-Storage NVRAM-based Architecture for Data-Centric Workloads. On-chip Cache Memory Fault-Tolerance. CLICK HERE TO VIEW OTHER PUBLISHED PAPERS.

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