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Semiconductor Equipment: June 2008
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In Front of Line (FOL) process, there are three main process. Die Prep, Die Attach and Wire Bonding. Saturday, June 28, 2008. Strasbaugh 7AA wafer grinder. Axus Technology - CMP Equipment, Post-CMP Cleaning and Wafer Grinding Equipment. SEMICONDUCTOR AND MEMS PROCESS EQUIPMENT FOR CMP AND BACK GRINDING PROCESSES. Axus maintains an inventory of processing tools available, which are refurbished and configured to customer specifications. IPEC 472 and IPEC 372M. IPEC 776, Orbital Polisher. Axus Technology ma...
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Semiconductor Equipment: Wire Bonder 3200
http://semequip.blogspot.com/2009/03/wire-bonder-3200.html
In Front of Line (FOL) process, there are three main process. Die Prep, Die Attach and Wire Bonding. Monday, March 9, 2009. The Wire Bonder 3200 offers a 30 µm pitch process capability. With its increased Y bond range it copes with the widest range of substrates. The improved air bearing and the optimized bond head controller enhance the ultra fine pitch capabilities,. With unprecedented placement accuracy, over the entire bond range. A dual cartridge programmable heater further extends the operational a...
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Semiconductor Packaging: November 2008
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The latest news and information on semiconductor packaging, including wafer-level packaging, chip-scale packaging, 3-D integration, lead-free solder/RoHS, stacked die/packages, wafer bumping, die bonding, wire bonding, and encapsulation. Saturday, November 1, 2008. Intel Maintains Microprocessor Momentum in Q3. The picture was slightly different at rival Advanced Micro Devices Inc. (AMD), with the company losing share on a year-over-year basis. In the third quarter of 2008, AMD accounted for 12&#...8220;...
sempack.blogspot.com
Semiconductor Packaging: September 2007
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The latest news and information on semiconductor packaging, including wafer-level packaging, chip-scale packaging, 3-D integration, lead-free solder/RoHS, stacked die/packages, wafer bumping, die bonding, wire bonding, and encapsulation. Sunday, September 23, 2007. To provide these necessary functions of interconnection, physical support, environmental protection and heat dissipation, the active device must be surrounded by or encased in a package. An illustrarion of this concept is presented in Figu...
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Semiconductor Equipment: February 2007
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In Front of Line (FOL) process, there are three main process. Die Prep, Die Attach and Wire Bonding. Thursday, February 15, 2007. Stacked Packages Get Thinner. By John Baliga, Contributing Editor -. Document.write(get publication('Semiconductor International') ;. Semiconductor International, 11/1/2006. The micro contacts themselves are. There are two basic process flows, but they both start with a sheet of copper foil that can be up to 120 µm thick. A thin (1 µm) layer of nickel is plated on top, fol...
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Semiconductor Equipment: March 2007
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In Front of Line (FOL) process, there are three main process. Die Prep, Die Attach and Wire Bonding. Saturday, March 17, 2007. Fine Pitch Au Wire Bonding. Fine Pitch Au Wire Bonding. Fine pitch wire bonding for bonding high density die is measured in pitch. This is a pitch that every year gets a little smaller. The limiting factor on the Palomar Model 8000 is generally the capillary. The model 8000 can bond with as little as 4 grams of force! Model 8000 Wire Bonder. Wire = .6 mil (15 um) 99.99 Au.
semequip.blogspot.com
Semiconductor Equipment: November 2008
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In Front of Line (FOL) process, there are three main process. Die Prep, Die Attach and Wire Bonding. Saturday, November 1, 2008. Oerlikon Esec is one of the world′s leading suppliers of innovative wire bonding solutions. Owing to our many years of experience, we can satisfy a wide range of customer needs in terms of reliability, assembly productivity, excellent customer support and an excellent cost of ownership. Esec Wire Bonder 3200. In conventional wire bonder design, the bondhead is mounted on an ort...
semequip.blogspot.com
Semiconductor Equipment: September 2007
http://semequip.blogspot.com/2007_09_01_archive.html
In Front of Line (FOL) process, there are three main process. Die Prep, Die Attach and Wire Bonding. Sunday, September 23, 2007. Saturday, September 15, 2007. WHAT IS FLIP CHIP? IBM introduced flip chip interconnection in the early sixties for their mainframe computers, and has continued to use flip chip since then. Delco Electronics developed flip chip for automotive applications in the seventies. Delphi Delco currently places over 300,000 flip chip die per day into automotive electronics. M...Worldwide...
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Semiconductor Packaging: Renesas Subsidiary Creates High-Temp QFN-Like Package
http://sempack.blogspot.com/2009/03/renesas-subsidiary-creates-high-temp.html
The latest news and information on semiconductor packaging, including wafer-level packaging, chip-scale packaging, 3-D integration, lead-free solder/RoHS, stacked die/packages, wafer bumping, die bonding, wire bonding, and encapsulation. Monday, March 9, 2009. Renesas Subsidiary Creates High-Temp QFN-Like Package. Kenji Tsuda, Asia Contributing Editor - Semiconductor International, 2/17/2009 7:27:00 AM. Renesas Northern Japan, a subsidiary of Renesas Technology Corp. Renesas provides three types of Pro&#...