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Benjamin Krill » computer research and developmentBenjamin Krill - FPGA, Embedded Systems und High Performance Computing Beratung und Entwicklung. FPGA und Liunx Prototyp und Produkt Entweicklungen /
http://www.krll.de/
Benjamin Krill - FPGA, Embedded Systems und High Performance Computing Beratung und Entwicklung. FPGA und Liunx Prototyp und Produkt Entweicklungen /
http://www.krll.de/
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Benjamin Krill » computer research and development | krll.de Reviews
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Benjamin Krill - FPGA, Embedded Systems und High Performance Computing Beratung und Entwicklung. FPGA und Liunx Prototyp und Produkt Entweicklungen /
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FPGAFS - Benjamin Krill
http://www.krll.de/portfolio/fpgafs
October 11, 2016. Http:/ git.krll.de/public/fpgafs.git/. The presented VHDL implementation provides a bit d. Virtual high performance reconfigurable computer e. HDMI/DVI data stream decoding and encoding modules. Despite careful contentwise control we do not take over adhesion for contents more externally left. For contents of the linked sides are responsible excluding their operator. All contents and rights of the web page are property web pages of the operator.
Cyclone V ARM Experiments - Benjamin Krill
http://www.krll.de/portfolio/cyclone-v-arm-experiments
Cyclone V ARM Experiments. Cyclone V ARM Experiments. Cyclone V ARM Experiments. October 11, 2016. This page shows some results obtained during various experiments done with the Arrow SoCKit development board, which contains an Altera Cyclone V ARM FPGA. The repository contains a build environment which creates all needed Cyclone V SoC images. To do so, Altera Quartus including EDS must be installed and the env must contain the following exports:. Export QUARTUS ROOTDIR=/home/dev/altera/13.1/quartus/.
HDMI/DVI VHDL Decoder/Encoder - Benjamin Krill
http://www.krll.de/portfolio/hdmi_dvi_vhdl_decoder_encoder
October 11, 2016. The implemented module is basically a translation of [1] from Verilog to VHDL. 1] http:/ www.xilinx.com/support/documentation/application notes/xapp495 s6tmds video interface.pdf. The presented VHDL implementation provides a bit d. Virtual high performance reconfigurable computer e. HDMI/DVI data stream decoding and encoding modules.
VHDL Round-Robin Arbiter - Benjamin Krill
http://www.krll.de/portfolio/round-robin-arbiter
October 11, 2016. The presented VHDL implementation provides a bit deallocation in a round-robin fashion. To create a priority arbiter, we just calculate the two’s complement of the request signal and bitwise AND the result with the request line (1). As result the least significant bit has the highest priority. This equation always returns the request with the highest priority. 1) gnt = req and not(req) 1;. 2) reqs = req and not ( pre gntM – 1) or pre gntM);. 1) gnts = reqs and not(reqs) 1;.
Cypress FX2 Framework - Benjamin Krill
http://www.krll.de/portfolio/cypress-fx2-framework
October 11, 2016. The framework consists of the Cypress FX2 firmware, FPGA streaming module and Linux application using libusb. Http:/ git.krll.de/public/fx2.git/. The presented VHDL implementation provides a bit d. Virtual high performance reconfigurable computer e. HDMI/DVI data stream decoding and encoding modules.
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Uncategorized | un.codiert.org
http://un.codiert.org/category/uncategorized
Some thoughts of Benjamin Krill. Serial console with upstart / for Fedora 9. Since Fedora 9, the init process is managed by upstart. To get a serial console with a login prompt the old method doesn’t work anymore. The old method is to add the following line into /etc/inittab: s0:3:respawn:/sbin/agetty -L 115200 ttyS0 vt100 This spawns a agetty for the ttyS0 in runlevel 3. The new method is … Continue reading “Serial console with upstart / for Fedora 9”. November 6, 2008. July 18, 2012. October 3, 2008.
Hardware | | un.codiert.org
http://un.codiert.org/tag/hardware
Some thoughts of Benjamin Krill. V5OSDK aka ML505 / xupv5-lx110t FPGA. Today the a new development board received. It has an Virtex5 FPGA soldered and a lot of I/O connections. It is sold by Digilent Inc. as “Virtex-5 OpenSPARC Evaluation Kit”. Digilent has soldered a Virtex5 110T on the board instead of a Virtex5 50T as Xilinx on the ML505. All other components on the board … Continue reading “V5OSDK aka ML505 / xupv5-lx110t FPGA”. August 29, 2008. November 23, 2008. Proudly powered by WordPress.
Serial | | un.codiert.org
http://un.codiert.org/tag/serial
Some thoughts of Benjamin Krill. Serial console with upstart / for Fedora 9. Since Fedora 9, the init process is managed by upstart. To get a serial console with a login prompt the old method doesn’t work anymore. The old method is to add the following line into /etc/inittab: s0:3:respawn:/sbin/agetty -L 115200 ttyS0 vt100 This spawns a agetty for the ttyS0 in runlevel 3. The new method is … Continue reading “Serial console with upstart / for Fedora 9”. November 6, 2008. July 18, 2012.
VHDL | | un.codiert.org
http://un.codiert.org/tag/vhdl
Some thoughts of Benjamin Krill. VHDL: Get needed bit count for a given number. The following recursive VHDL function provides the needed bit count for a given integer number. function len(x: integer) return integer is begin if (x =1) then return 1; else return 1 len(x/2); end if; end len;. July 6, 2009. A way to decide either one or more bits are active (VHDL). April 23, 2009. Round Robin Arbiter (VHDL). April 1, 2009. September 13, 2013. Xilinx MIG DDR2 266Mhz. November 23, 2008. November 23, 2008.
Small Talk | | un.codiert.org
http://un.codiert.org/tag/small-talk
Some thoughts of Benjamin Krill. Motor Center – Indoor. Today I had a great day. I spend the whole day in Villingen and drove my motorbike on an indoor track (http:/ www.mo-ce.de/). It was the first time this year and the first time indoor. Also the handling of the motorbike was complete different, this could be related to the new suspension I invested during the … Continue reading “Motor Center – Indoor”. February 7, 2009. February 8, 2009. August 28, 2008. August 29, 2008. Proudly powered by WordPress.
CUDA | | un.codiert.org
http://un.codiert.org/tag/cuda
Some thoughts of Benjamin Krill. I started looking into the graphic card programming especially Nvdia CUDA stuff. After getting the SDK compiling under Fedora 12 (so far only possible with compat-gcc) first examples could be tested. It is quite impressive how fast and nice some tests look like. To get somehow familiar with the framework, I wrote a simple memcpy … Continue reading “CUDA programming”. January 22, 2010. January 31, 2010. For freelancing/consulting requests, please visit www.krll.de.
Coffee | | un.codiert.org
http://un.codiert.org/tag/coffee
Some thoughts of Benjamin Krill. Jura Impressa C5 white. The day is there, a new coffee machine is my own. It has a lot of features and configuration possibilities, but the important thing the coffee taste very good. With the attached “Easy-Cappuccino-Düse” it is a breeze to make wonderful milk froth. Further you can choose how strong your coffee or espresso should be scald … Continue reading “Jura Impressa C5 white”. October 16, 2008. October 16, 2008. Proudly powered by WordPress.
WEB | un.codiert.org
http://un.codiert.org/category/development/web
Some thoughts of Benjamin Krill. Polymer core-ajax – Basic Authorization. September 3, 2014. September 3, 2014. 1 Comment on Polymer core-ajax – Basic Authorization. For freelancing/consulting requests, please visit www.krll.de. Proudly powered by WordPress.
Board | | un.codiert.org
http://un.codiert.org/tag/board
Some thoughts of Benjamin Krill. Cypress CY7C6300 EZ-Host/EZ-Peripheral #1. Time to play with the next part of the ML505 board. The soldered USB chip is provided by Cypress and can be configured as a host and peripheral device. It contains a 16-Bit Risc Core, two serial interface engines (4 USB Ports) and a lot of other useful things (UART, SPI, IDE interface). To provide … Continue reading “Cypress CY7C6300 EZ-Host/EZ-Peripheral #1”. October 3, 2008. October 5, 2008. V5OSDK aka ML505 / xupv5-lx110t FPGA.
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Benjamin Krill » computer research and development
Computer research and development. IP Core Prototyping/Entwicklung, PCI/PCI-E/USB/Ethernet, High-/Low-Speed Protokolle. FPGA Auswahl, Design-Hierarchie, VHDL/Verilog/Schaltplan, IP Core. Herstellerunabhängige Beratung und Entwicklung. System Prototyping. Linux/Windows/andere Treiber, UBoot/Slof/Coreboot Portierung/Prototyping. Kernel, Filesystem, verteilte Systeme, Beratung für skalierbare/hochverfügbare Systeme. Android/IOS Implementierungen, Mobile Cross-Plattform Entwicklung. Cyclone V ARM Experiments.
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Vidensmedier
Torsdag den 11. december 2008. Det fysiske medie remedieres til computeren, fx bøger til e-bøger, Google Books eller cd til mp3. Web 2.0 er ikke, som jeg troede, en download fra Internettet eller en program-rom fra Microsoft, men en betegnelse for at der på Internettet er mulighed for at føre dialog, samarbejde og heri de sociale teknologier (folksonomier) som tags, rating mv, hvor der videndeles . Bastian skriver nogenlunde det modsatte [i]. Bastian Ind i musikken s.16. Fredag den 17. oktober 2008.
Król Lew
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