lackingrhoticity.blogspot.com

Lacking Rhoticity

Monday, 8 January 2018. Observing interrupts from userland on x86. In 2016, I noticed a quirk of the x86 architecture that leads to an interesting side channel. On x86, it is possible for a userland process to detect when it has been interrupted by an interrupt handler, without resorting to timing. This is because the usual mechanism for handling interrupts (without using virtualisation) doesn't always preserve all userland registers across an interrupt handler. Gs was reset after 1807364 iterations.

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Lacking Rhoticity | lackingrhoticity.blogspot.com Reviews

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Monday, 8 January 2018. Observing interrupts from userland on x86. In 2016, I noticed a quirk of the x86 architecture that leads to an interesting side channel. On x86, it is possible for a userland process to detect when it has been interrupted by an interrupt handler, without resorting to timing. This is because the usual mechanism for handling interrupts (without using virtualisation) doesn't always preserve all userland registers across an interrupt handler. Gs was reset after 1807364 iterations.

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1 lacking rhoticity

2 why this happens

3 documentation for iret

4 possible uses

5 mitigation via virtualisation

6 posted by

7 mark seaborn

8 1 comment

9 some background passmark

10 no comments

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Lacking Rhoticity | lackingrhoticity.blogspot.com Reviews

https://lackingrhoticity.blogspot.com

Monday, 8 January 2018. Observing interrupts from userland on x86. In 2016, I noticed a quirk of the x86 architecture that leads to an interesting side channel. On x86, it is possible for a userland process to detect when it has been interrupted by an interrupt handler, without resorting to timing. This is because the usual mechanism for handling interrupts (without using virtualisation) doesn't always preserve all userland registers across an interrupt handler. Gs was reset after 1807364 iterations.

INTERNAL PAGES

lackingrhoticity.blogspot.com

1

Lacking Rhoticity: November 2011

http://lackingrhoticity.blogspot.com/2011_11_01_archive.html

Saturday, 19 November 2011. Stack unwinding risks on 64-bit Windows. Recently, I've been looking at how x86-64 Windows does stack unwinding in 64-bit processes, and I've found some odd behaviour. If the stack unwinder finds a return address on the stack that does not have associated unwind info, it applies a fallback unwind rule that does not make much sense. In pseudocode, the current unwind logic looks something like this:. Void unwind stack(struct register state regs) { while (? Regsrsp = 8;. Since th...

2

Lacking Rhoticity: September 2012

http://lackingrhoticity.blogspot.com/2012_09_01_archive.html

Saturday, 29 September 2012. Native Client's NTDLL patch on x86-64 Windows. Last year, I found a security hole in Native Client. On 64-bit Windows that could be used to escape from the Native Client sandbox. Fortunately I found the hole before Native Client was enabled by default in Chrome. I recently wrote up the document below. To explain the bug and how we fixed it. The problem arises because Windows does not have an equivalent of Unix's sigaltstack() system call. This is a problem for NaCl because wh...

3

Lacking Rhoticity: March 2014

http://lackingrhoticity.blogspot.com/2014_03_01_archive.html

Wednesday, 26 March 2014. How to do history-sensitive merges in Git. Merging in Git is usually not history-sensitive. By this I mean: if you're merging branches A and B together, Git looks at the content at the tips of branches A and B, and the content of the common ancestor commit(s) of A and B, but it doesn't look at any commits inbetween. Git just does a 3-way merge. This can make merging more painful than it needs to be. This is a short "how to" for doing a history-sensitive merge in Git. A large num...

4

Lacking Rhoticity: July 2014

http://lackingrhoticity.blogspot.com/2014_07_01_archive.html

Wednesday, 23 July 2014. Implementing fork() on the Mill CPU. Is a new CPU architecture that claims to provide high performance but at a much better performance-per-watt than conventional CPUs that use out-of-order execution. The Mill achieves this by making various architectural simplifications. One of those is to remove the TLB. From the fast path of memory accesses. Rather than having the TLB between the CPU core and the cache, the Mill's TLB is between the cache and main memory. If you create forked ...

5

Lacking Rhoticity: Python standard library in Native Client

http://lackingrhoticity.blogspot.com/2009/06/python-standard-library-in-native.html

Sunday, 14 June 2009. Python standard library in Native Client. The Python standard library now works under Native Client. In the web browser, including the Sqlite. By that I mean that it is possible to import modules from the standard library, but a lot of system calls won't be available. Sqlite works for in-memory use. Here's a screenshot of the browser-based Python REPL:. The changes needed to make this work were quite minor:. Some tweaks to nacl-glibc-gcc, a wrapper script for nacl-gcc. If its a one-...

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blog.stuffedcow.net

Intel Ivy Bridge Cache Replacement Policy « Blog

http://blog.stuffedcow.net/2013/01/ivb-cache-replacement

Laquo; Measuring Reorder Buffer Capacity. A Comparison of Intel’s 32nm and 22nm Core i5 CPUs: Power, Voltage, Temperature, and Frequency. Intel Ivy Bridge Cache Replacement Policy. By Henry, on January 25th, 2013. And a follow-on paper High performance cache replacement using re-reference interval prediction (RRIP). Figure 1: Cache access latencies for four Intel microarchitectures (Stride = 64 bytes) [png]. Figure 1 clearly shows two levels of cache for the Yorkfield Core 2 (32 KB and 6 MB) and three le...

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Monday, 8 January 2018. Observing interrupts from userland on x86. In 2016, I noticed a quirk of the x86 architecture that leads to an interesting side channel. On x86, it is possible for a userland process to detect when it has been interrupted by an interrupt handler, without resorting to timing. This is because the usual mechanism for handling interrupts (without using virtualisation) doesn't always preserve all userland registers across an interrupt handler. Gs was reset after 1807364 iterations.

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Includes high-quality download in MP3, FLAC and more. Paying supporters also get unlimited streaming via the free Bandcamp app. Limited Edition CD Single. A beautifully prepared version of the song. Overpriced for a more ergonomic lightweight wallet. Includes unlimited streaming of. Via the free Bandcamp app, plus high-quality download in MP3, FLAC and more. Ships out within 14 days. The biggest hit from the hit band Lacking Something. Now available for your digital downloading need! Feeds for this album.