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Parallel digital fault simulation using CUDA

Parallel digital fault simulation using CUDA. This is my log of my progress. Tuesday, April 6, 2010. Meeting #7 with Supervisor. Discussed the report. The fact that the project is not fully functional on the CUDA device is not an major problem. That element of the project is in progress and I can demonstrate that by showing the net list being created on the CUDA device/emulator. Monday, March 29, 2010. Helpful Tips for Writing Reports. Thursday, March 25, 2010. Removed all usages of uthash. This approach...

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Parallel digital fault simulation using CUDA | matthew-fyp.blogspot.com Reviews
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Parallel digital fault simulation using CUDA. This is my log of my progress. Tuesday, April 6, 2010. Meeting #7 with Supervisor. Discussed the report. The fact that the project is not fully functional on the CUDA device is not an major problem. That element of the project is in progress and I can demonstrate that by showing the net list being created on the CUDA device/emulator. Monday, March 29, 2010. Helpful Tips for Writing Reports. Thursday, March 25, 2010. Removed all usages of uthash. This approach...
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Parallel digital fault simulation using CUDA | matthew-fyp.blogspot.com Reviews

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Parallel digital fault simulation using CUDA. This is my log of my progress. Tuesday, April 6, 2010. Meeting #7 with Supervisor. Discussed the report. The fact that the project is not fully functional on the CUDA device is not an major problem. That element of the project is in progress and I can demonstrate that by showing the net list being created on the CUDA device/emulator. Monday, March 29, 2010. Helpful Tips for Writing Reports. Thursday, March 25, 2010. Removed all usages of uthash. This approach...

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Parallel digital fault simulation using CUDA: Quirky Development using CUDA

http://www.matthew-fyp.blogspot.com/2010/03/quirky-development-using-cuda.html

Parallel digital fault simulation using CUDA. This is my log of my progress. Sunday, March 21, 2010. Quirky Development using CUDA. There are a number of things that make writing a program for CUDA different to writing a normal C program:. One must declare which functions run on the device and which run on the host using keywords:. Global means that the function is a thread kernel which runs on the device. This function can only be invoked using. Subscribe to: Post Comments (Atom). Voltage Level Bug Fixed.

2

Parallel digital fault simulation using CUDA: November 2009

http://www.matthew-fyp.blogspot.com/2009_11_01_archive.html

Parallel digital fault simulation using CUDA. This is my log of my progress. Thursday, November 12, 2009. Flex Scanner for Logic Description built. Colin described the Lex scanner generator in Language Processors and I tried to use it. I generates the C code of a scanner given a scanner description which is made up of primarily regular expressions. I used Flex to generate a scanner which tokenises the logic description input file. This is the code:. Whitespace [ t n]. Return LEFT PAR;. Return RIGHT PAR;.

3

Parallel digital fault simulation using CUDA: January 2010

http://www.matthew-fyp.blogspot.com/2010_01_01_archive.html

Parallel digital fault simulation using CUDA. This is my log of my progress. Sunday, January 31, 2010. Simulating a Race Condition. Just finished adding support for NOT, NAND, NOR and XOR gates and I tried simulating a simple circuit which would produce a race condition. It's a simple circuit which uses a NAND gate and a NOT gate and demonstrates the problem which gate delay can introduce into a system. The logic and stimulus descriptions are:. AND O1 W1 I1. Saturday, January 30, 2010. I need to examine ...

4

Parallel digital fault simulation using CUDA: August 2009

http://www.matthew-fyp.blogspot.com/2009_08_01_archive.html

Parallel digital fault simulation using CUDA. This is my log of my progress. Tuesday, August 25, 2009. Fault simulation of digital systems is important but expensive to do. CUDA is an API and toolkit for parallel programming on graphics cards ( http:/ www.nvidia.com/object/cuda home.html. This project will interest people who are curious about how logic simulation works and about parallel programming. Subscribe to: Posts (Atom).

5

Parallel digital fault simulation using CUDA: September 2009

http://www.matthew-fyp.blogspot.com/2009_09_01_archive.html

Parallel digital fault simulation using CUDA. This is my log of my progress. Wednesday, September 30, 2009. Wrote out a simple time-line. For the project which specifies deadlines and shows the FYP milestones. Tuesday, September 22, 2009. Fault Simulation is the process of measuring the quality of a Test. Thursday, September 17, 2009. Information about Logic Simulation. Found a good site. Wednesday, September 9, 2009. Meeting #1 with Supervisor. The meeting covered a few different things:. And measure th...

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Parallel digital fault simulation using CUDA

Parallel digital fault simulation using CUDA. This is my log of my progress. Tuesday, April 6, 2010. Meeting #7 with Supervisor. Discussed the report. The fact that the project is not fully functional on the CUDA device is not an major problem. That element of the project is in progress and I can demonstrate that by showing the net list being created on the CUDA device/emulator. Monday, March 29, 2010. Helpful Tips for Writing Reports. Thursday, March 25, 2010. Removed all usages of uthash. This approach...

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