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Binary Logic | An accumulation of chips, bits and electronic glue….An accumulation of chips, bits and electronic glue....
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Binary Logic | An accumulation of chips, bits and electronic glue…. | nhiphanlogic.wordpress.com Reviews
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An accumulation of chips, bits and electronic glue....
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Virtual UART for the Terasic DE0-Nano | Binary Logic
https://nhiphanlogic.wordpress.com/2014/07/05/virtual-uart-for-the-terasic-de0-nano/comment-page-1
An accumulation of chips, bits and electronic glue…. Virtual UART for the Terasic DE0-Nano. The Terasic DE0-Nano is an excellent device, but it lacks an easily accessible UART to get information in and out of your design. Fortunately, Altera’s Virtual JTAG functionality allows easy access to logic inside of your design. Chris Zeh wrote an excellent article on this Virtual JTAG functionality and how to easily send data in and out of the chip. You can read his blog entry here. This entry was tagged Altera.
UrJTAG and Python – A lightweight HAL? | Binary Logic
https://nhiphanlogic.wordpress.com/2014/07/28/urjtag-and-python-a-lightweight-hal
An accumulation of chips, bits and electronic glue…. UrJTAG and Python – A lightweight HAL? Following up on my last post on a Virtual UART for the DE0 Nano. I’ve been exploring ways to make the logic available on any PC. The Nano is small and portable enough to carry around and use on any machine, but if you need to install Quartus on it before you can connect through to the logic, it sort of loses it’s portability. Before you can tackle what you really wanted? What’s the point of that, you may ask?
About | Binary Logic
https://nhiphanlogic.wordpress.com/about
An accumulation of chips, bits and electronic glue…. This blog came about when I realised that while we’re all still learning, 30 years of reading and experimentation in electronics and software meant that I could help some people who were just starting. My goal is to provide plain-English explanations, usable templates and pre-built examples for topics that interest me to enthuse and inspire those who follow. Leave a Reply Cancel reply. Enter your comment here. Address never made public).
July | 2014 | Binary Logic
https://nhiphanlogic.wordpress.com/2014/07
An accumulation of chips, bits and electronic glue…. Monthly Archives: July 2014. UrJTAG and Python – A lightweight HAL? Following up on my last post on a Virtual UART for the DE0 Nano. I’ve been exploring ways to make the logic available on any PC. The Nano is small and portable enough to carry around and use on any machine, but if you need to install Quartus on it before you can connect through to the logic, it sort of loses it’s portability. Before you can tackle what you really wanted? A linux instal...
Virtual UART for the Terasic DE0-Nano | Binary Logic
https://nhiphanlogic.wordpress.com/2014/07/05/virtual-uart-for-the-terasic-de0-nano
An accumulation of chips, bits and electronic glue…. Virtual UART for the Terasic DE0-Nano. The Terasic DE0-Nano is an excellent device, but it lacks an easily accessible UART to get information in and out of your design. Fortunately, Altera’s Virtual JTAG functionality allows easy access to logic inside of your design. Chris Zeh wrote an excellent article on this Virtual JTAG functionality and how to easily send data in and out of the chip. You can read his blog entry here. This entry was tagged Altera.
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Binary Logic | An accumulation of chips, bits and electronic glue….
An accumulation of chips, bits and electronic glue…. UrJTAG and Python – A lightweight HAL? Following up on my last post on a Virtual UART for the DE0 Nano. I’ve been exploring ways to make the logic available on any PC. The Nano is small and portable enough to carry around and use on any machine, but if you need to install Quartus on it before you can connect through to the logic, it sort of loses it’s portability. Before you can tackle what you really wanted? What’s the point of that, you may ask?
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