hiroyuki.tomiyama-lab.org
Japanese - Hiroyuki Tomiyama
http://hiroyuki.tomiyama-lab.org/japanese
冨山 宏之 (とみやま ひろゆき). Ht at fc.ritsumei.ac.jp. 院 Advanced Topics in LSI Design Technology. 院 Embedded Software Design. ACM SIGDA and SIGBED. IEEE CASS and CS. IEEE CEDA All Japan Joint Chapter. 運営委員, 電子情報通信学会 VLSI設計技術研究会. IEEE Embedded Systems Letters (ESL). IPSJ Transactions on System LSI Design Methodology (TSLDM). SAC 2016 EMBS Track. TPC Topic Chair,. TPC Subcommittee Chair,. カリフォルニア大学アーバイン校 客員研究員 (日本学術振興会 海外特別研究員).
lalsie.ist.hokudai.ac.jp
LALSIE News and Updates
http://lalsie.ist.hokudai.ac.jp/news/en
IST, Hokkaido University, Japan. Reconfigurable processor array architecture for DCNN (SASIMI 2016). Ando K., Orimo K., Ueyoshi K., Ikebe M., Asai T., and Motomura M., "Reconfigurable processor array architecture for deep convolutional neural cetworks," The 20th Workshop on Synthesis And System Integration of Mixed Information Technologies, Kyoto Research Park, Kyoto, Japan (Oct. 24-25, 2016). Fri, 5 Aug 2016 13:51:36 0900. Naive Bayes classifier for dynamic branch prediction (APCCAS 2016). Marukame T...
linas.ist.hokudai.ac.jp
LALSIE News and Updates
http://linas.ist.hokudai.ac.jp/news/en
IST, Hokkaido University, Japan. Live demonstration of feature extraction FPGA systems at ISCAS 2017. Ueyoshi K., Marukame T., Asai T., Motomura M., and Schmid A., "Feature extraction system using restricted Boltzmann machines on FPGA," 2017 IEEE International Symposium on Circuits and Systems, A4P-O, Baltimore Marriott Waterfront, Baltimore, USA (May 28-31, 2017). Sat, 18 Feb 2017 17:26:00 0900. Exploring optimized accelerator design for binarizedl CNN (IJCNN 2017). Mon, 6 Feb 2017 11:06:56 0900. Low la...
linda.ist.hokudai.ac.jp
LALSIE News and Updates
http://linda.ist.hokudai.ac.jp/news/en
IST, Hokkaido University, Japan. Live demonstration of feature extraction FPGA systems at ISCAS 2017. Ueyoshi K., Marukame T., Asai T., Motomura M., and Schmid A., "Feature extraction system using restricted Boltzmann machines on FPGA," 2017 IEEE International Symposium on Circuits and Systems, A4P-O, Baltimore Marriott Waterfront, Baltimore, USA (May 28-31, 2017). Sat, 18 Feb 2017 17:26:00 0900. Exploring optimized accelerator design for binarizedl CNN (IJCNN 2017). Mon, 6 Feb 2017 11:06:56 0900. Low la...
gds.csis.oita-u.ac.jp
Links
http://gds.csis.oita-u.ac.jp/lab/bin/view/Main/Links
Green and Dependable Systems Laboratory. Last modified by Satoshi Ohtake. Design Automation Conference (DAC). Design Automation and Test in Europe (DATE). International Conference on Computer-Aided-Design (ICCAD). International Conference on Computer Design (ICCD). International Test Conference (ITC). European Test Symposium (ETS). Asian Test Symposium (ATS). International Symposium on Asynchronous Circuits and Systems (ASYNC). International Symposium on Networks-on-Chip (NOCS). JR Kyushu Railway Company.