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x86 Verilog ip core for asic and fpga

Valptek group develops x86-32 compatible core, targeting small area and linux OS. We believe a small core compatible with x86-32 ISA is suitable for Low Power appliances - e.g. IoT and microservers. Verilog Model is synthetisable for FPGA or ASIC. 32 bit CPU core. 6x86 ISA compatible "ppro". Linux 2.6/3.x capable. Peripherals: pic, pit, uart. Cmpxchg8b, cmov, tsc. Linux FPU emu / not hard FPU. Contact : contact@valptek.com. Link to Videos on Youtube Channel.

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x86 Verilog ip core for asic and fpga | valptek.com Reviews
<META>
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Valptek group develops x86-32 compatible core, targeting small area and linux OS. We believe a small core compatible with x86-32 ISA is suitable for Low Power appliances - e.g. IoT and microservers. Verilog Model is synthetisable for FPGA or ASIC. 32 bit CPU core. 6x86 ISA compatible ppro. Linux 2.6/3.x capable. Peripherals: pic, pit, uart. Cmpxchg8b, cmov, tsc. Linux FPU emu / not hard FPU. Contact : contact@valptek.com. Link to Videos on Youtube Channel.
<META>
KEYWORDS
1 valptek
2 features
3 fpga proven
4 not implemented
5 pae/pse/msr/nx bit
6 virtual x86
7 decimal instructions
8 segment limits
9 partial tss
10 sse mmx
CONTENT
Page content here
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PAGE
valptek,features,fpga proven,not implemented,pae/pse/msr/nx bit,virtual x86,decimal instructions,segment limits,partial tss,sse mmx,deliverables,verilog netlist,technical information,product family
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x86 Verilog ip core for asic and fpga | valptek.com Reviews

https://valptek.com

Valptek group develops x86-32 compatible core, targeting small area and linux OS. We believe a small core compatible with x86-32 ISA is suitable for Low Power appliances - e.g. IoT and microservers. Verilog Model is synthetisable for FPGA or ASIC. 32 bit CPU core. 6x86 ISA compatible "ppro". Linux 2.6/3.x capable. Peripherals: pic, pit, uart. Cmpxchg8b, cmov, tsc. Linux FPU emu / not hard FPU. Contact : contact@valptek.com. Link to Videos on Youtube Channel.

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x86 Verilog ip core for asic and fpga

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Deliverables can be technology independent Netlists or Verilog RTL.

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x86 Verilog ip core for asic and fpga

Valptek group develops x86-32 compatible core, targeting small area and linux OS. We believe a small core compatible with x86-32 ISA is suitable for Low Power appliances - e.g. IoT and microservers. Verilog Model is synthetisable for FPGA or ASIC. 32 bit CPU core. 6x86 ISA compatible "ppro". Linux 2.6/3.x capable. Peripherals: pic, pit, uart. Cmpxchg8b, cmov, tsc. Linux FPU emu / not hard FPU. Contact : contact@valptek.com. Link to Videos on Youtube Channel.

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