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Verification Page

Tuesday, April 26, 2011. 1) GLS is used for checking some of the functionality before reset like POR sequence, bootup etc. 1) In the gates X propagation can happen because of. A) unintialized inputs - We can intialize the inputs. B) unintialized outputs - This has to be root caused and corrected. C) non resetable flops - The problem can be identified by forcing. A known value to this flop and checking that the logic is working. 2) In the testbench there might be few internal signals that might be. By SV ...

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Verification Page | vpages.blogspot.com Reviews
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Tuesday, April 26, 2011. 1) GLS is used for checking some of the functionality before reset like POR sequence, bootup etc. 1) In the gates X propagation can happen because of. A) unintialized inputs - We can intialize the inputs. B) unintialized outputs - This has to be root caused and corrected. C) non resetable flops - The problem can be identified by forcing. A known value to this flop and checking that the logic is working. 2) In the testbench there might be few internal signals that might be. By SV ...
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1 verification page
2 why gls
3 uses of gls
4 issues in gls
5 does not exists
6 will be x
7 posted by
8 sreenivasa batta
9 no comments
10 labels gls
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verification page,why gls,uses of gls,issues in gls,does not exists,will be x,posted by,sreenivasa batta,no comments,labels gls,class declartions,functions,endfunction,tasks,endpackage,module tb ;,initial begin,check pack ;,endmodule,note,int *pi;,c clock
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Verification Page | vpages.blogspot.com Reviews

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Tuesday, April 26, 2011. 1) GLS is used for checking some of the functionality before reset like POR sequence, bootup etc. 1) In the gates X propagation can happen because of. A) unintialized inputs - We can intialize the inputs. B) unintialized outputs - This has to be root caused and corrected. C) non resetable flops - The problem can be identified by forcing. A known value to this flop and checking that the logic is working. 2) In the testbench there might be few internal signals that might be. By SV ...

INTERNAL PAGES

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1

Verification Page: August 2008

http://vpages.blogspot.com/2008_08_01_archive.html

Thursday, August 28, 2008. Pointers in C and C. 1) How to declare a pointer? Imagine that we have an int called i. Its address could be represented by the symbol &i. If the pointer is to be stored as a variable, it should be stored like this. Int *pi = &i;. Two step process will be. 2) How this program is interpreted by the C compiler? 4: float fl=3.14;. B) The contents stored at that address are retrieved. 3) Can we seperate the above two steps in C? Do only step 1 on a variable &fl. 6: return 0;. 7: pr...

2

Verification Page: Pointers in C and C++

http://vpages.blogspot.com/2008/08/pointers-in-c-and-c.html

Thursday, August 28, 2008. Pointers in C and C. 1) How to declare a pointer? Imagine that we have an int called i. Its address could be represented by the symbol &i. If the pointer is to be stored as a variable, it should be stored like this. Int *pi = &i;. Two step process will be. 2) How this program is interpreted by the C compiler? 4: float fl=3.14;. B) The contents stored at that address are retrieved. 3) Can we seperate the above two steps in C? Do only step 1 on a variable &fl. 6: return 0;. 7: pr...

3

Verification Page: April 2008

http://vpages.blogspot.com/2008_04_01_archive.html

Wednesday, April 23, 2008. Sunday, April 20, 2008. 1) All OpenVera source file shall have the ".vr" type. 2) All OpenVera aspect-oriented extension source file shall have the ".vra" type (not supported in VCS). 3) All manually written OpenVera header file shall have the ".vri" type. 4) Automatically generated Vera header file shall have the ".vrh" extension. 5) Header files corresponding to source files should be automatically generated. Thursday, April 10, 2008. Bugs in ATE Testing. Per frame: 75% (This...

4

Verification Page: Gate Level Simulation

http://vpages.blogspot.com/2008/08/gate-level-simulation.html

Tuesday, August 19, 2008. Even though a lot of STA and Formal verification tools exists in the industry now a days, one question still arises in the mind of many verification engineers. The question is "Why do we go for a gate level simulation? Some years ago, I felt that gate level simulation were not worth. In my view, if we do static timing analysis (STA) - Those who want to know more about STA, please click here. But the common reason to go for a gate level simulations are as follows:. Takes a huge a...

5

Verification Page: Why GLS

http://vpages.blogspot.com/2011/04/why-gls.html

Tuesday, April 26, 2011. 1) GLS is used for checking some of the functionality before reset like POR sequence, bootup etc. 1) In the gates X propagation can happen because of. A) unintialized inputs - We can intialize the inputs. B) unintialized outputs - This has to be root caused and corrected. C) non resetable flops - The problem can be identified by forcing. A known value to this flop and checking that the logic is working. 2) In the testbench there might be few internal signals that might be.

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Verification Page

Tuesday, April 26, 2011. 1) GLS is used for checking some of the functionality before reset like POR sequence, bootup etc. 1) In the gates X propagation can happen because of. A) unintialized inputs - We can intialize the inputs. B) unintialized outputs - This has to be root caused and corrected. C) non resetable flops - The problem can be identified by forcing. A known value to this flop and checking that the logic is working. 2) In the testbench there might be few internal signals that might be. By SV ...

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