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White Flag: June 2009

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Http:/ whiteflag.wikidot.com. Friday, June 19, 2009. SDC: Get Clocks Feeding a Pin. Get Clocks Feeding a Pin. This design example shows a custom procedure, which you can use in SDC files, that returns a list of all clocks that feed a pin. The procedure can be helpful if you need to create generated clocks without knowing other clock names in a design. The full code for the procedure is at the bottom of this page. Save the procedure code. In a separate SDC file and include the SDC file in the project.

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White Flag: December 2009

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Http:/ whiteflag.wikidot.com. Wednesday, December 16, 2009. Understanding Recovery and Removal Analysis (ZT). Understanding Recovery and Removal Analysis. TimeQuest automatically does recovery and removal analysis, which is a type of static timing analysis that many users are unfamiliar with. The purpose of this document is to briefly describe what is being analyzed, as well as what a failure might look like in a user design, and some suggestions on what a user can do to meet timing. So the clock delays ...

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White Flag: FPGA reset

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Http:/ whiteflag.wikidot.com. Thursday, August 11, 2011. Reset bridge circuit asserts asynchronously and deasserts synchronously. Subscribe to: Post Comments (Atom). View my complete profile.

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White Flag: Altera Qsys

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Http:/ whiteflag.wikidot.com. Friday, May 13, 2011. Improve performance by adding pipeline and also adopting packet layer for MM interface. Q: what about the latency of MM command? A Qsys can be re-used as a sub-system. The conduit interface can be either connected within a Qsys or export to top, which is very good. V doesn't include the source files anymore. will need to adjust script to get rtl file list. Qsys doesn't generate cpu.v which includes rtl source files and path. View my complete profile.

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White Flag: March 2011

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Http:/ whiteflag.wikidot.com. Monday, March 28, 2011. Click image to enlarge. Friday, March 25, 2011. Xilinx TCL Flow Example. Usage: xtclsh try.tcl. Xtclsh is Xilinx tcl shell. Reference: http:/ www.xilinx.com/itp/xilinx10/books/docs/dev/dev.pdf. Details on commandline and tcl command to create and setup project. Http:/ www.doulos.com/knowhow/tcltk/xilinx/. From an existing project, a tcl script can be generated in ISE/project/generate tcl. The following is oen of my example tcl script. Project set "Ver...

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White Flag: Define HDL Macro via quartus command line

http://voicexixi.blogspot.com/2011/06/define-hdl-macro-via-quartus-command.html

Http:/ whiteflag.wikidot.com. Tuesday, June 28, 2011. Define HDL Macro via quartus command line. Quartus map my design - verilog macro="a=2". An example in Makefile:. MAP ARGS = - verilog macro="a=$(A ID)". QUARTUS MAP BIN) $(MAP ARGS) $(PROJECT) -c $(REVISION). Note: If the macro has been already defined in HDL, the definition here in command line won't override it. So, make sure remove the definition in HDL. To make simulation happy,. Set global assignment -name VERILOG MACRO "a=2".

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White Flag: August 2011

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Http:/ whiteflag.wikidot.com. Thursday, August 11, 2011. Reset bridge circuit asserts asynchronously and deasserts synchronously. Wednesday, August 10, 2011. A white paper from Mentor. Click following link to read the paper. It's in my dropbox. Signal Integrity from Mentor. Subscribe to: Posts (Atom). View my complete profile.

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White Flag: July 2009

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Http:/ whiteflag.wikidot.com. Thursday, July 2, 2009. Convert text file between dos and unix. How to Convert DOS. How do I convert between Unix. Operating systems (which includes Microsoft Windows) differ in the format in which they store text files. DOS. Places both a line feed and a carriage return character at the end of each line of a text file, but Unix. Uses only a line feed character. Some DOS. Applications need to see carriage return characters at the ends of lines, and may treat Unix. Format whe...

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White Flag: Quartus Makefile flow

http://voicexixi.blogspot.com/2011/03/quartus-makefile-flow.html

Http:/ whiteflag.wikidot.com. Monday, March 28, 2011. Click image to enlarge. Subscribe to: Post Comments (Atom). Xilinx TCL Flow Example. A good blog site to look at. If you are doing EE s. Spansion S29GL512N simulation model issue. CVS tag - delete, rename, remove. View my complete profile.